Multilayer dielectric for metal-insulator-metal capacitor (mimcap) capacitance and leakage improvement

ABSTRACT

A tri-layer dielectric stack is provided for a metal-insulator-metal capacitor (MIMCAP). Also, a metal-insulator-metal capacitor (MIMCAP) is provided having three or more electrodes. The tri-layer dielectric stack includes a first layer formed from a first metal oxide electrical insulator. The tri-layer dielectric stack further includes a second layer, disposed over the first layer, formed from ZrO2. The tri-layer dielectric stack also includes a third layer, disposed over the second layer, formed from a second metal oxide electrical insulator.

BACKGROUND Technical Field

The present invention relates generally to capacitors and, inparticular, to a multilayer dielectric for metal-insulator-metalcapacitor (MIMCAP) capacitance and leakage improvement.

Description of the Related Art

Stacked capacitors (>2 electrodes) with Metal/Insulator(High-k)/Metalstacks have been proposed. In order to obtain sufficiently highcapacitance density per area, 3-D capacitor structures have beenemployed, in addition to a k-value increase for the High-k insulator.

A three electrode stacked capacitor was implemented in the prior art toaddress this challenge of capacitance density for decoupling capacitors.However, since the electrical bias polarities are opposite for thebottom capacitor and the top capacitor in the aforementioned threeelectrode stacked capacitor, the thickness of the high-k material needsto be sufficiently thick to pass reliability specifications for theweaker side. This results in lower capacitance density. Thus, there is aneed for improved stacked capacitors.

SUMMARY

According to an aspect of the present invention, a tri-layer dielectricstack is provided for a metal-insulator-metal capacitor (MIMCAP). Thetri-layer dielectric stack includes a first layer formed from a firstmetal oxide electrical insulator. The tri-layer dielectric stack furtherincludes a second layer, disposed over the first layer, formed fromZrO₂. The tri-layer dielectric stack also includes a third layer,disposed over the second layer, formed from a second metal oxideelectrical insulator.

According to another aspect of the present invention, a method isprovided for forming a tri-layer dielectric stack for ametal-insulator-metal capacitor (MIMCAP). The method includes forming afirst layer from a first metal oxide electrical insulator. The methodfurther includes forming, disposed over the first layer, a second layerformed from ZrO₂. The method also includes forming, disposed over thesecond layer, a third layer formed from a second metal oxide electricalinsulator.

According to yet another aspect of the present invention, ametal-insulator-metal capacitor (MIMCAP) is provided having three ormore electrodes. The metal-insulator-metal capacitor includes two ormore tri-layer dielectric stacks. Each of the two or more tri-layerdielectric stacks has a first layer formed from is first metal oxideelectrical insulator, a second layer, disposed over the first layer,formed from ZrO₂, and a third layer, disposed over the second layer,formed from a second metal oxide electrical insulator. Themetal-insulator-metal capacitor further includes a plurality of platesforming at least two plate pairs. Each of the at least two plate panshas a respective one of the two or more tri-layer dielectric stacksdisposed there between. The metal-insulator-metal capacitor alsoincludes three or more electrodes.

These and other features and advantages will become apparent from thefollowing detailed description of illustrative embodiments thereof,which is to be read in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

The following description will provide details of preferred embodimentswith reference to the following figures wherein:

FIG. 1 shows a block diagram for an exemplary multilayer dielectricstack for a metal-insulator-metal capacitor (MIMCAP), in accordance withan embodiment of the present invention;

FIG. 2 shows a schematic diagram for an exemplary metal-insulator-metalcapacitor (MIMCAP), in accordance with an embodiment of the presentinvention;

FIG. 3 shows an exemplary method for forming a multilayer dielectricstack for a metal-insulator-metal capacitor stack, in accordance with anembodiment of the present invention; and

FIG. 4 shows an exemplary method for forming a metal-insulator-metalcapacitor (MIMCAP), in accordance with an embodiment of the presentinvention.

DETAILED DESCRIPTION

The present invention is directed to a multilayer dielectric stack(hereinafter interchangeably referred to as “multilayer dielectric” inshort) for a metal-insulator-metal capacitor (MIMCAP). The multilayerdielectric advantageously provides capacitance and leakage improvementin a MIMCAP.

In an embodiment, a tri-layer stack of Al₂O₃/ZrO₂/Al₂O₃ is used as amultilayer dielectric in a stacked capacitor (more than 2 electrodes).The tri-layer stack improves capacitance density compared toAl₂O₃/HfO₂/Al₂O₃, thus enabling high-k thickness scaling. That is, theuse of ZrO2 in the tri-layer stack contributes to an improved dielectricconstant (e.g., k≈30-40) within the tri-layer stack as compared to thedielectric constant of HfO₂ (k≈20), due to the formation of a higher kphase when deposited on Al2O3 compared to the lower k phase of HfO₂.While Al₂O₃ is used in the aforementioned tri-layer stack, in otherembodiments, other oxides and/or nitrides and/or oxynitrides can be usedin place of Al₂O₃, while maintaining the spirit of the presentinvention.

In an embodiment, a tri-layer layer stack of Al₂O₃/ZrO₂/Al₂O₃ is used asa as a multilayer dielectric in 2-plate MIMCAP.

The present invention can be used for applications including, but notlimited to, for example, an embedded DRAM capacitor, a decouplingcapacitor, Back End Of Line applications, and so forth.

As used herein, a “DRAM” refers to a memory device wherein a basic cellis provided with a selection transistor and a capacitor. A gate of theselection transistor is connected to a word line, a drain thereof isconnected to a bit line, and a source thereof is connected to anelectrode or the capacitor. A gate of the selection transistor isconnected to a word line, a drain thereof is connected to a bit line,and a source thereof is connected to an electrode or the capacitor thatis, to an earthed electrode.

As used herein, the term “capacitor” denotes a structure including oneor more pairs of electrically conductive materials separated andinsulated from each other by a multilayer dielectric for storing acharge. The present invention specifically applies to the multilayerdielectric in a metal-insulator-metal capacitor (MIMCAP). In anembodiment, the MIMCAP includes three or more electrodes.

As used herein, the term “electrode” denotes a component of a capacitorrepresenting one of at least two electrically conductive materials ofthe capacitor that are separated by a multilayer dielectric inaccordance with the present invention.

As used, herein, the term “dielectric” denotes a non-metallic materialhaving a room temperature conductivity of less than about 10-10(−m)−1.

As used herein, the term “high-k” denotes a material having a dielectricconstant (k) that is greater than the dielectric constant of siliconoxide (SiO₂) at room temperature (20° C.-25° C.) and atmosphericpressure (1 atm).

FIG. 1 shows a block diagram for an exemplary multilayer dielectricstack 100 for a metal-insulator-metal capacitor (MIMCAP), in accordancewith an embodiment of the present invention. It is to be appreciatedthat the elements of stack 100 are not shown drawn to scale, for thesakes of illustration and clarity.

The multilayer dielectric stack (hereinafter “multilayer dielectric” inshort) 100 includes a first layer 110, a second layer 120, and a thirdlayer 130. The first layer 110 is formed of Al₂O₃. The second layer 120is formed of ZrO₂. The third layer 130 is formed of Al₂O₃.

The layers 110, 120, and 130 can be formed using any known or yet to beinvented layer forming techniques including, but not limited to,spinning from solution, spraying from solution, atomic layer deposition(ALD), chemical vapor deposition (CVD), plasma enhanced CVD (PECVD),sputter deposition, reactive sputter deposition, ion-beam deposition,and evaporation.

FIG. 2 shows a schematic diagram for an exemplary metal-insulator-metalcapacitor (MIMCAP) 200, in accordance with an embodiment of the presentinvention. It is to be appreciated that the elements of MIMCAP 200 arenot shown drawn to scale, for the sakes of illustration and clarity.

The MIMCAP 200 includes a first plate 211, a multilayer dielectric stack221, a second plate 212, a multilayer dielectric stack 222, and a thirdplate 213. The second plate 212 is connected to an electrode 212A. Thefirst plate 211 is connected to another electrode (not shown), and thethird plate 213 is connected to yet another electrode (not shown). Eachof the multilayer dielectric stack 221 and the multilayer dielectricstack 222 can be implemented by, e.g., the multilayer dielectric 100 ofFIG. 1.

The first plate 211, the multilayer dielectric stack 221, and the secondplate 212 form a first capacitor 251, while the second plate 212, themultilayer dielectric stack 222, and the third plate 213 form a secondcapacitor 252. The electrical bias polarities 277 are opposing for thefirst capacitor 251 and the second capacitor 252. However, the use ofZrO2 contributes to (i) an improved dielectric constant within thestacks 221 and 222 and (ii) an improved capacitance density (comparedto, e.g., Al₂O₃/HfO₂/Al₂O₃), thus enabling high-K thickness scaling.

FIG. 3 shows an exemplary method 300 for forming a multilayer dielectricstack for a metal-insulator-metal capacitor stack, in accordance with anembodiment of the present invention.

At step 310, form a first layer from Al₂O₃. Of course, other electricalinsulating compounds can be used for the first layer, while maintainingthe spirit of the present invention.

At step 320, form, disposed over the first layer, a second layer fromZrO₂.

At step 330, form, disposed over the second layer, a third layer fromAl₂O₃. Of course, other electrical insulating compounds can be used forthe third layer, while maintaining the spirit of the present invention.

FIG. 4 shows an exemplary method 400 for forming a metal-insulator-metalcapacitor (MIMCAP), in accordance with an embodiment of the presentinvention.

At step 410, form a first capacitor.

In an embodiment, step 410 includes steps 410A-410C relating to theformation of a tri-layer dielectric stack (for the first capacitor) inaccordance with an embodiment of the present invention.

At step 410A, form a first layer from Al₂O₃. Of course, other electricalinsulating compounds can be used for the first layer, while maintainingthe spirit of the present invention.

At step 420B, form, disposed over the first layer, a second layer fromZrO₂.

At step 430C, form, disposed over the second layer, a third layer fromAl₂O₃. Of course, other electrical insulating compounds can be used forthe third layer, while maintaining the spirit of the present invention.

At step 420, form, disposed over the first capacitor, a secondcapacitor.

In an embodiment, step 420 includes steps 410A-410C relating to theformation of a tri-layer dielectric stack (for the second capacitor) inaccordance with an embodiment of the present invention.

At step 410A, form a first layer from Al₂O₃. Of course, other compoundscan be used for the first layer, while maintaining the spirit of thepresent invention.

At step 420B, form, disposed over the first layer, a second layer fromZrO₂.

At step 430C, form, disposed over the second layer, a third layer fromAl₂O₃. Of course, other compounds can be used for the third layer, whilemaintaining the spirit of the present invention.

In an embodiment, the first capacitor and the second capacitor can shareat least one plate. It is to be appreciated that not every aspect offorming a MIMCAP is shown in FIG. 4 for the sake of brevity, as FIG. 4is primarily directed to the formation of tri-layer dielectric stacks ina MIMCAP (as described with respect to steps 410A-C and 420A-C).

It is to be understood that aspects of the present invention will bedescribed in terms of a given illustrative architecture; however, otherarchitectures, structures, substrate materials and process features andsteps can be varied within the scope of aspects of the presentinvention.

It will also be understood that when an element such as a layer, regionor substrate is referred to as being “on” or “over” another clement, itcan be directly on the other element or intervening elements can also bepresent. In contrast, when an element is referred to as being “directlyon” or “directly over” another element, there are no interveningelements present. It will also be understood that when an element isreferred to as being “connected” or “coupled” to another element, it canbe directly connected or coupled to the other element or interveningelements can be present. In contrast, when an element is referred to asbeing “directly connected” or “directly coupled” to another element,there are no intervening elements present.

The present embodiments can include a design for an integrated circuitchip, which can be created in a graphical computer programming language,and stored in a computer storage medium (such as a disk, tape, physicalhard drive, or virtual hard drive such as in a storage access network).If the designer does not fabricate chips or the photolithographic masks,used to fabricate chips, the designer can transmit the resulting designby physical means (e.g., by providing a copy of the storage mediumstoring the design) or electronically (e.g., through the Internet) tosuch entities, directly or indirectly. The stored design is thenconverted into the appropriate format (e.g. GDSII) for the fabricationof photolithographic masks, which typically include multiple copies ofthe chip design in question that are to be formed on a wafer. Thephotolithographic masks are utilized to define areas of the wafer(and/or the layers thereon) to be etched or otherwise processed.

Methods as described herein can be used in the fabrication of integratedcircuit chips. The resulting integrated circuit chips can be distributedby the fabricator in raw wafer form (that is, as a single wafer that hasmultiple unpackaged chips), as a bare die, or in a packaged form. In thelatter case, the chip is mounted in a single chip package (such as aplastic carrier, with leads that are affixed to a motherboard or otherhigher level carrier) or in a multichip package (such as a ceramiccarrier that has either or both surface interconnections or buriedinterconnections). In any case, the chip is then integrated with otherchips, discrete circuit elements, and/or other signal processing devicesas part of either (a) an intermediate product, such as a motherboard, or(b) an end, product. The end product can be any product that includesintegrated circuit chips, ranging from toys and other low-endapplications to advanced computer products having a display, a keyboardor other input device, and a central processor.

It should also be understood that material compounds will be describedin terms of listed elements, e.g., SiGe. These compounds includedifferent proportions of the elements within the compound, e.g., SiGeincludes Si_(x)Ge_(1-x) where x is less than or equal to 1, etc. Inaddition, other elements can be included in the compound and stillfunction in accordance with the present principles. The compounds withadditional elements will be referred to herein as alloys.

Reference in the specification to “one embodiment” or “an embodiment”,as well as other variations thereof, means that a particular feature,structure, characteristic, and so forth described in connection with theembodiment is included in at least one embodiment. Thus, the appearancesof the phrase “in one embodiment” or “in an embodiment”, as well anyother variations, appearing in, various places throughout specificationare not necessarily all referring to the same embodiment.

It is to be appreciated that the use of any of the following “/”,“and/or”, and “at least one of”, for example, in the cases of “A/B”, “Aand/or B” and “at least one of A and B”, is intended to encompass theselection of the first listed option (A) only, or the selection of thesecond listed option (B) only, or the selection of both options (A andB). As a further example, in the cases of “A, B, and/or C” and “at leastone of A, B, and C”, such phrasing is intended to encompass theselection of the first listed option (A) only, or the selection of thesecond listed option (B) only, or the selection of the third listedoption (C) only, or the selection of the first and the second listedoptions (A, and B) only, or the selection of the first and third listedoptions (A and C) only, or the selection of the second and third listedoptions (B and C) only, or the selection of all three options (A and Band C). This can be extended, as readily apparent by one of ordinaryskill, in this and related arts, for as many items listed.

The terminology used herein is for the purpose of describing particularembodiments only and is not intended to be limiting of exampleembodiments. As used herein, the singular forms “a,” “an” and “the” areintended to include the plural forms as well, unless the context clearlyindicates otherwise, it will be further understood that the terms“comprises,” “comprising,” “includes” and/or “including,” when usedherein, specify the presence of stated features, integers, steps,operations, elements and/or components, but do not preclude the presenceor addition of one or more other features, integers, steps, operations,elements, components and/or groups thereof.

Spatially relative terms, such as “beneath,” “below,” “lower,” “above,”“upper,” and the like, can be used herein for ease of description todescribe one element's or feature's relationship to another element(s)or feature(s) as illustrated in the FIGS. It will be understood that thespatially relative terms are intended to encompass differentorientations of the device in use or operation in addition to theorientation depicted in the FIGS. For example, if the device in theFIGS. is turned over, elements described as “below” or “beneath” otherelements or features would then be oriented “above” the other elementsor features. Thus, the term “below” can encompass both an orientation ofabove and below. The device can be otherwise oriented (rotated 90degrees or at other orientations), and the spatially relativedescriptors used herein can be interpreted accordingly. In addition, itwill also be understood that when a layer is referred to as being“between” two layers, it can be the only layer between the two layers,or one or more intervening layers can also be present.

It will be understood that, although the terms first, second, etc. canbe used herein to describe various elements, these elements should notbe limited by these terms. These terms are only used to distinguish oneelement from another element. Thus, a first element discussed belowcould be termed a second element without departing from the scope of thepresent concept.

Having described preferred embodiments of an apparatus and method (whichare intended to be illustrative and not limiting), it is noted thatmodifications and variations can be made by persons skilled in the artin light of the above teachings. It is therefore to be understood thatchanges may be made in the particular embodiments disclosed which arewithin the scope of the invention as outlined by the appended claims.Having thus described aspects of the invention, with the details andparticularity required by the patent laws, what is claimed and desiredprotected by Letters Patent is set forth in the appended claims.

1. A tri-layer dielectric stack for a metal-insulator-metal capacitor(MIMCAP), the tri-layer dielectric stack comprising: a first layerformed from a first metal oxide electrical insulator; a second layer,directly on the first layer, formed from ZrO₂; and a third layer,directly on the second layer, formed from a second metal oxideelectrical insulator, wherein the first metal oxide electrical insulatorand the second metal oxide electrical insulator are each Al₂O₃, and thefirst metal oxide electrical insulator and the second metal oxideelectrical insulator are identical to provide symmetrical electricalproperties. 2-20. (canceled)
 21. A tri-layer dielectric stack for ametal-insulator-metal capacitor (MIMCAP), the tri-layer dielectric stackcomprising: a first layer formed from a first metal oxide electricalinsulator; a second layer, on the first layer, formed from ZrO₂, whereinthe ZrO₂ has a dielectric constant, k, in the range of about 30 to about40; and a third layer, on the second layer, formed from a second metaloxide electrical insulator, wherein the first metal oxide electricalinsulator and the second metal oxide electrical insulator are eachAl₂O₃, and the portion of the ZrO₂ of the second layer in contact withthe Al₂O₃ of the first layer has a higher k phase.
 22. A tri layerdielectric stack for a metal-insulator-metal capacitor (MIMCAP), thetri-layer dielectric stack comprising: a first layer formed from a firstmetal oxide electrical insulator; a second layer, directly on the firstlayer, formed from ZrO₂; and a third layer, directly on the secondlayer, formed from a second metal oxide electrical insulator, whereinthe first metal oxide electrical insulator and the second metal oxideelectrical insulator are each aluminum oxynitride.